[Àü°øµµ¼/´ëÇб³Àç] VERILOG ÇÕ¼º: ÃÖÀûÀÇ ÇÕ¼ºÀ» À§ÇÑ ¼³°è °¡À̵å
Verilog HDL Synthesis, A Practical Primer
J. Bhasker Àú/°ûÁ¾¿í ¿ªIµµ¼ÃâÆÇ È«¸ª(È«¸ª°úÇÐÃâÆÇ»ç)I2010.09.03
15,000¿ø
450P (3%)
ÆǸÅÁö¼ö 25